CVEvulnerability

CVE-2022-27813

8.2 HIGH Published 2023-10-19 Modified 2026-06-17 Official page ↗
Status
Modified
Published
2023-10-19
Last modified
2026-06-17
Assigner
[email protected]
CVSS 3.1 ([email protected])
8.1 HIGH — CVSS:3.1/AV:L/AC:L/PR:H/UI:N/S:C/C:L/I:H/A:H
CVSS 3.1 ([email protected])
8.2 HIGH — CVSS:3.1/AV:L/AC:L/PR:H/UI:N/S:C/C:H/I:H/A:H
Weaknesses
CWE-1260

Description

Motorola MTM5000 series firmwares lack properly configured memory protection of pages shared between the OMAP-L138 ARM and DSP cores. The SoC provides two memory protection units, MPU1 and MPU2, to enforce the trust boundary between the two cores. Since both units are left unconfigured by the firmwares, an adversary with control over either core can trivially gain code execution on the other, by overwriting code located in shared RAM or DDR2 memory regions.

Affected configurations

• motorola mtm5500 firmware • motorola mtm5400 firmware

Related

Weakness · CWE (1)

  • CWE-1260 Improper Handling of Overlap Between Protected Memory Ranges weakness

References