CVEvulnerability
CVE-2023-31315
7.5 HIGH
Official page ↗
- Status
- Deferred
- Published
- 2024-08-12
- Last modified
- 2026-06-17
- Assigner
- [email protected]
- CVSS 3.1 ([email protected])
- 7.5 HIGH — CVSS:3.1/AV:L/AC:H/PR:H/UI:N/S:C/C:H/I:H/A:H
- CVSS 3.1 (134c704f-9b21-4f2e-91b3-4a467353bcc0)
- 6.8 MEDIUM — CVSS:3.1/AV:A/AC:L/PR:L/UI:N/S:U/C:L/I:H/A:L
- Weaknesses
- CWE-94
Description
Improper validation in a model specific register (MSR) could allow a malicious program with ring0 access to modify SMM configuration while SMI lock is enabled, potentially leading to arbitrary code execution.
Related
Weakness · CWE (1)
- CWE-94 Improper Control of Generation of Code weakness
References
- https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7014.html www.amd.com
- https://media.defcon.org/DEF%20CON%2032/DEF%20CON%2032%20presentations/DEF%20CON%2032%20-%20Enrique%20Nissim%20Krzysztof%20Okupski%20-%20AMD%20Sinkclose%20Universal%20Ring-2%20Privilege%20Escalation.pdf media.defcon.org
- https://news.ycombinator.com/item?id=41475975 news.ycombinator.com
- https://www.darkreading.com/remote-workforce/amd-issues-updates-for-silicon-level-sinkclose-flaw www.darkreading.com