CVEvulnerability

CVE-2025-63384

6.5 MEDIUM Published 2025-11-10 Modified 2026-06-17 Official page ↗
Status
Analyzed
Published
2025-11-10
Last modified
2026-06-17
Assigner
[email protected]
CVSS 3.1 (134c704f-9b21-4f2e-91b3-4a467353bcc0)
6.5 MEDIUM — CVSS:3.1/AV:N/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:N
Weaknesses
CWE-266

Description

A vulnerability was discovered in RISC-V Rocket-Chip v1.6 and before implementation where the SRET (Supervisor-mode Exception Return) instruction fails to correctly transition the processor's privilege level. Instead of downgrading from Machine-mode (M-mode) to Supervisor-mode (S-mode) as specified by the sstatus.SPP bit, the processor incorrectly remains in M-mode, leading to a critical privilege retention vulnerability.

Affected configurations

• chipsalliance rocketchip (<= 1.6)

Related

Weakness · CWE (1)

  • CWE-266 Incorrect Privilege Assignment weakness

References