GHSA-gw5p-q8mj-p7gh Miscompilation of wasm `i64x2.shr_s` instruction with constant input on x86_64

• crates.io wasmtime: >= 10.0.0, < 10.0.2 → fixed in 10.0.2 • crates.io wasmtime: >= 11.0.0, < 11.0.2 → fixed in 11.0.2 • crates.io wasmtime: >= 12.0.0, < 12.0.2 → fixed in 12.0.2

Impact Wasmtime versions from 10.0.0 to 12.0.1 contain a miscompilation of the WebAssembly `i64x2.shr_s` instruction on x86_64 platforms when the shift amount is a constant value that is larger than 32. Only x86_64 is affected so all other targets are not affected by this. The miscompilation results in the instruction producing an incorrect result, namely the low 32-bits of the second lane of the vector are derived from the low 32-bits of the second lane of the input vector instead of the high 32-bits. The primary impact of this issue is that any WebAssembly program using the `i64x2.shr_s` with a constant shift amount larger than 32 may produce an incorrect result. This issue is not an escape from the WebAssembly sandbox. Execution of WebAssembly guest programs will still behave correctly with respect to memory sandboxing and isolation from the host. Wasmtime considers non-spec-compliant behavior as a security issue nonetheless. This issue was discovered through fuzzing of Wasmtime's code generator Cranelift. Patches Wasmtime versions 10.0.2, 11.0.2, and 12.0.2 are all patched to no longer have this miscompilation. Workarounds This issue only affects x86_64 hosts and the only workaround is to either scan for this pattern in wasm modules which is nontrivial or to disable the SIMD proposal for WebAssembly. Users prior to 10.0.0 are unaffected by this vulnerability. References • PR which introduced this bug to Wasmtime • Mailing list announcement