CAPECattack pattern
CAPEC-696 Load Value Injection
Very High
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- Abstraction
- Detailed
- Status
- Draft
- Likelihood of attack
- Low
- Typical severity
- Very High
- CAPEC version
- 3.9
Description
An adversary exploits a hardware design flaw in a CPU implementation of transient instruction execution in which a faulting or assisted load instruction transiently forwards adversary-controlled data from microarchitectural buffers. By inducing a page fault or microcode assist during victim execution, an adversary can force legitimate victim execution to operate on the adversary-controlled data which is stored in the microarchitectural buffers. The adversary can then use existing code gadgets and side channel analysis to discover victim secrets that have not yet been flushed from microarchitectural state or hijack the system control flow.
Extended description
This attack is a mix of techniques used in traditional Meltdown and Spectre attacks. It uses microarchitectural data leakage combined with code gadget abuse. Intel has identified that this attack is not applicable in scenarios where the OS and the VMM (Virtual Memory Manager) are both trusted. Because of this, Intel SGX is a prime target for this attack because it assumes that the OS or VMM may be malicious.
Execution flow
1. [Explore] [Survey target application and relevant OS shared code libraries] Adversary identifies vulnerable transient instruction sets and the code/function calls to trigger them as well as instruction sets or code fragments (gadgets) to perform attack. The adversary looks for code gadgets which will allow them to load an adversary-controlled value into trusted memory. They also look for code gadgets which might operate on this controlled value.
2. [Experiment] [Fill microarchitectural buffer with controlled value] The adversary will utilize the found code gadget from the previous step to load a value into a microarchitectural buffer.
3. [Experiment] [Set up instruction to page fault or microcode assist] The adversary must manipulate the system such that a page fault or microcode assist occurs when a valid instruction is run. If the instruction that fails is near where the adversary-controlled value was loaded, the system may forward this value from the microarchitectural buffer incorrectly.
4. [Exploit] [Operate on adversary-controlled data] Once the attack has been set up and the page fault or microcode assist occurs, the system operates on the adversary-controlled data.
Prerequisites
• The adversary needs at least user execution access to a system and a maliciously crafted program/application/process with unprivileged code to misuse transient instruction set execution of the CPU.
• The CPU incorrectly transiently forwards values from microarchitectural buffers after faulting or assisted loads
• The adversary needs the ability to induce page faults or microcode assists on the target system.
• Code gadgets exist that allow the adversary to hijack transient execution and encode secrets into the microarchitectural state.
Skills required
• [High] Detailed knowledge on how various CPU architectures and microcode perform transient execution for various low-level assembly language code instructions/operations.
• [High] Detailed knowledge on compiled binaries and operating system shared libraries of instruction sequences, and layout of application and OS/Kernel address spaces for data leakage.
• [High] The ability to provoke faulting or assisted loads in legitimate execution.
Consequences
• Confidentiality: Read Data
• Access Control: Bypass Protection Mechanism
• Authorization: Execute Unauthorized Commands
Mitigations
• Do not allow the forwarding of data resulting from a faulting or assisted instruction. Some current mitigations claim to zero out the forwarded data, but this mitigation still does not suffice.
• Insert explicit “lfence” speculation barriers in software before potentially faulting or assisted loads. This halts transient execution until all previous instructions have been executed and ensures that the architecturally correct value is forwarded.
Related
Child of · CAPEC (1)
- CAPEC-663 Exploitation of Transient Instruction Execution attack pattern
Weakness · CWE (1)
- CWE-1342 Information Exposure through Microarchitectural State after Transient Execution weakness
Referenced by CWE · attack pattern (1)
- CWE-1342 Information Exposure through Microarchitectural State after Transient Execution weakness